Synopsys HCM - DFT Engineer

About Synopsys

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

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Business Area Description

The Solutions Group high-quality, silicon-proven semiconductor IP solutions for SoC designs. The Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, signal/power integrity analysis, and IP prototyping kits. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.

Position: DFT Engineer

Job Descriptions:

• Create DFT specification based on architecture specification from Front End team
• Perform DFT design rule check and scan insertion
• Perform ATPG and coverage debugging
• Perform DFT verification with and without timing back annotation.
• Support Customer in bringing up DFT pattern in Silicon.

Requirements:

• Good knowledge of DFT architecture
• Familiar with DFT flow, including DFT design, implementation, verification, pattern, and testing
• Experience in Scan/BSD/LBIST
• Familiar with scripting languages, such as TCL, Perl, and  Verilog.
• Good knowledge of synthesis, timing closure and silicon test
• Good English/communication skills and willingness to work with a global team

Preferred Experience:

• Ideally, should have 2+ years of DFT design background and have led teams on implementation/verification of Design-for-Test logic on a few designs
• Knowledge of synthesis/ timing/ constraint/ layout is a plus
• Familiar with pattern debugging, failure analysis, and yield improvement

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

• Degree: Bachelor
• Age: Unlimited
• Working time: Permanent