RGF's Client - Japanese tech company - is looking for Design & Verification Engineer to perform comprehensive front-end design verification for ASIC and LSI products, ensuring functional correctness and quality from customer specifications through RTL design and advanced verification methodologies.
- Working Location: Thanh My Tay Ward, HCMC
- Monthly Salary: 25,000,000 ~ 35,000,000VND (Gross)
- Job Responsibilities:
- Analyze customer requirements and specifications to define verification scope.
- Develop and document functional specifications and implementation specifications.
- Create RTL code using Verilog / SystemVerilog.
- Formulate and document the overall verification strategy and detailed verification item tables.
- Design and build verification environments and scenarios using SystemVerilog, SVA, UVM, and C.
- Write and maintain verification environment manuals.
- Execute verification plans, analyze results, and compile verification reports.
- Perform front-end design and verification of ASICs (Application-Specific Integrated Circuits).
- Conduct design and verification using general-purpose bus protocols such as AMBA (AXI/AHB/APB).
- Implement Assertion-Based Verification methodologies.
- Undertake verification tasks for designs involving built-in CPUs.
- Verify high-speed interfaces like PCI Express and USB.
- Implement random verification techniques using SystemVerilog.
- Complete other technical or project-related tasks assigned by the manager.

