Synopsys - Foundation IP Layout Engineer, Senior

Introduction
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

Position: Foundation IP Layout Engineer

Level: Senior/Staff Engineer

Job Description:

In the role of a Senior/ Staff Layout design engineer, you will take the responsibility to:

• Designs, develops and modifies layout design for Embedded Memory IPs, Standard Cells, IOs
• Improves and Determines methods and procedures for Layout development flow
• Coaches Layout Design Engineer at lower levels

Key Qualifications

• Bachelor’s or Master’s degree, Electronics Engineering, Telecommunication, Physics or related fields
• Typically, minimum of 5 years of experiences in Layout design
• Advanced knowledge of Custom Layout and a deep understanding of Embedded Memory Layout. 
• Strong communication, documentation and analytical skills.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

• Bằng cấp: Đại học
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